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FPGA_Uni
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de1f346f64db3d617e4afe37232c65f1fdc5e27e
FPGA_Uni
/
Quartus
/
A1_Q5
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simulation
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questa
T
History
TroubleElectrical
c27a04ef73
Implemented instruction classifier on board (Q6) and added blank submission files (for now)
2026-09-15 20:00:35 +10:00
..
shifter.sft
Added all Testbenches to Modelsim and confirmed working operation
2026-09-15 15:15:00 +10:00
shifter.svo
Implemented instruction classifier on board (Q6) and added blank submission files (for now)
2026-09-15 20:00:35 +10:00
