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TroubleElectrical/FPGA_Uni
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c27a04ef732dff6115953d4dbe376e2af762e5fc
FPGA_Uni/Quartus/A1_Q1/simulation/questa
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History
TroubleElectrical 9e5fb6f52b Updated ASU (Q3) to utilise the 7seg for output, confirmed operation of Q1 to Q3 on board
2026-09-15 16:52:48 +10:00
..
seven_seg.sft
Including quartus prime lite edition project folders for flashing the project to the board
2026-09-03 16:34:31 +10:00
seven_seg.svo
Updated ASU (Q3) to utilise the 7seg for output, confirmed operation of Q1 to Q3 on board
2026-09-15 16:52:48 +10:00
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