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TroubleElectrical/FPGA_Uni
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b9623569cf2cb22c0f815ae21a8e83f814619d2f
FPGA_Uni/Quartus/A1_Q1
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History
TroubleElectrical 179eb469c4 Removed seven segment code from alu and asu
2026-09-24 15:37:48 +10:00
..
db
Removed seven segment code from alu and asu
2026-09-24 15:37:48 +10:00
incremental_db
Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments
2026-09-15 21:08:40 +10:00
output_files
Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments
2026-09-15 21:08:40 +10:00
simulation/questa
Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments
2026-09-15 21:08:40 +10:00
c5_pin_model_dump.txt
Including quartus prime lite edition project folders for flashing the project to the board
2026-09-03 16:34:31 +10:00
q1.qpf
Including quartus prime lite edition project folders for flashing the project to the board
2026-09-03 16:34:31 +10:00
seven_seg_description.txt
Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments
2026-09-15 21:08:40 +10:00
seven_seg.qsf
Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments
2026-09-15 21:08:40 +10:00
seven_seg.qws
Updated ModelSim Files
2026-09-16 10:15:08 +10:00
seven_seg.sv
Added comments to Q1 code and made submission file
2026-09-16 10:33:08 +10:00
seven_seg.sv.bak
Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments
2026-09-15 21:08:40 +10:00
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