`ifndef HAZARD_SV
`define HAZARD_SV

module hazard_unit (
    input logic [0:0]   branch_decode,
    input logic [4:0]   rs_decode, rt_decode,
    
    input logic [4:0]   rs_execute, rt_execute,
    input logic [4:0]   rd_execute,
    input logic [0:0]   reg_write_execute, m2r_execute,

    input logic [4:0]   rd_memory,
    input logic [0:0]   reg_write_memory, m2r_memory,

    input logic [4:0]   rd_writeback,
    input logic [0:0]   reg_write_writeback,

    output logic [0:0]  stall_fetch, stall_decode,
    output logic [0:0]  forward_a_decode, forward_b_decode,
    output logic [0:0]  flush_execute,
    output logic [1:0]  forward_a_execute, forward_b_execute
);
    always_comb begin
        forward_a_execute = 2'b00;
        forward_b_execute = 2'b00;

        if ( (rs_execute != 5'd0) && (rs_execute == rd_memory) && reg_write_memory)
            forward_a_execute = 2'b10;
        else if ( (rs_execute != 5'd0) && (rs_execute == rd_memory) && reg_write_writeback)
            forward_a_execute = 2'b01;
        
        if ( (rt_execute != 5'd0) && (rt_execute == rd_memory) && reg_write_memory)
            forward_b_execute = 2'b10;
        else if ( (rt_execute != 5'd0) && (rt_execute == rd_memory) && reg_write_writeback)
            forward_b_execute = 2'b01;
    end

    logic [0:0] loaduse_stall;
    assign loaduse_stall = ((rs_decode == rt_execute) | (rt_decode == rt_execute)) & m2r_execute;

    assign forward_a_decode = (rs_decode != 5'd0) & (rs_decode == rd_memory) & reg_write_memory;
    assign forward_b_decode = (rt_decode != 5'd0) & (rt_decode == rd_memory) & reg_write_memory;

    logic [0:0] branch_stall;
    assign branch_stall =   (branch_decode & reg_write_execute  & (rd_execute == rs_decode || rd_execute == rt_decode) ) ||
                            (branch_decode & m2r_memory         & (rd_memory  == rs_decode || rd_memory  == rt_decode) );
    
    assign stall_fetch = loaduse_stall | branch_stall;
    assign stall_decode = loaduse_stall | branch_stall;
    assign flush_execute = loaduse_stall | branch_stall;
endmodule
`endif