// Copyright (C) 2025  Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and any partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, the Altera Quartus Prime License Agreement,
// the Altera IP License Agreement, or other applicable license
// agreement, including, without limitation, that your use is for
// the sole purpose of programming logic devices manufactured by
// Altera and sold by Altera or its authorized distributors.  Please
// refer to the Altera Software License Subscription Agreements 
// on the Quartus Prime software download page.

// VENDOR "Altera"
// PROGRAM "Quartus Prime"
// VERSION "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition"

// DATE "09/15/2026 18:56:29"

// 
// Device: Altera 5CGXFC5C6F27C7 Package FBGA672
// 

// 
// This Verilog file should be used for Questa Altera FPGA (SystemVerilog) only
// 

`timescale 1 ps/ 1 ps

module alu (
	op,
	A,
	B,
	OUT_1,
	flags,
	out_seg1);
input 	[3:0] op;
input 	[3:0] A;
input 	[3:0] B;
output 	[3:0] OUT_1;
output 	[1:0] flags;
output 	[7:0] out_seg1;

// Design Ports Information
// OUT_1[0]	=>  Location: PIN_F7,	 I/O Standard: 2.5 V,	 Current Strength: Default
// OUT_1[1]	=>  Location: PIN_F6,	 I/O Standard: 2.5 V,	 Current Strength: Default
// OUT_1[2]	=>  Location: PIN_G6,	 I/O Standard: 2.5 V,	 Current Strength: Default
// OUT_1[3]	=>  Location: PIN_G7,	 I/O Standard: 2.5 V,	 Current Strength: Default
// flags[0]	=>  Location: PIN_H7,	 I/O Standard: 2.5 V,	 Current Strength: Default
// flags[1]	=>  Location: PIN_J10,	 I/O Standard: 2.5 V,	 Current Strength: Default
// out_seg1[0]	=>  Location: PIN_M25,	 I/O Standard: 2.5 V,	 Current Strength: Default
// out_seg1[1]	=>  Location: PIN_V19,	 I/O Standard: 1.2 V,	 Current Strength: Default
// out_seg1[2]	=>  Location: PIN_V18,	 I/O Standard: 1.2 V,	 Current Strength: Default
// out_seg1[3]	=>  Location: PIN_V17,	 I/O Standard: 1.2 V,	 Current Strength: Default
// out_seg1[4]	=>  Location: PIN_W18,	 I/O Standard: 1.2 V,	 Current Strength: Default
// out_seg1[5]	=>  Location: PIN_Y20,	 I/O Standard: 1.2 V,	 Current Strength: Default
// out_seg1[6]	=>  Location: PIN_Y19,	 I/O Standard: 1.2 V,	 Current Strength: Default
// out_seg1[7]	=>  Location: PIN_Y18,	 I/O Standard: 1.2 V,	 Current Strength: Default
// op[2]	=>  Location: PIN_Y11,	 I/O Standard: 1.2 V,	 Current Strength: Default
// op[3]	=>  Location: PIN_AE19,	 I/O Standard: 1.2 V,	 Current Strength: Default
// op[0]	=>  Location: PIN_V10,	 I/O Standard: 1.2 V,	 Current Strength: Default
// op[1]	=>  Location: PIN_AC10,	 I/O Standard: 1.2 V,	 Current Strength: Default
// B[3]	=>  Location: PIN_AC8,	 I/O Standard: 1.2 V,	 Current Strength: Default
// A[3]	=>  Location: PIN_Y16,	 I/O Standard: 1.2 V,	 Current Strength: Default
// B[0]	=>  Location: PIN_AC9,	 I/O Standard: 1.2 V,	 Current Strength: Default
// A[0]	=>  Location: PIN_P11,	 I/O Standard: 1.2 V,	 Current Strength: Default
// B[1]	=>  Location: PIN_AE10,	 I/O Standard: 1.2 V,	 Current Strength: Default
// A[1]	=>  Location: PIN_P12,	 I/O Standard: 1.2 V,	 Current Strength: Default
// B[2]	=>  Location: PIN_AD13,	 I/O Standard: 1.2 V,	 Current Strength: Default
// A[2]	=>  Location: PIN_Y15,	 I/O Standard: 1.2 V,	 Current Strength: Default


wire gnd;
wire vcc;
wire unknown;

assign gnd = 1'b0;
assign vcc = 1'b1;
assign unknown = 1'bx;

tri1 devclrn;
tri1 devpor;
tri1 devoe;
wire \~QUARTUS_CREATED_GND~I_combout ;
wire \op[3]~input_o ;
wire \op[1]~input_o ;
wire \op[0]~input_o ;
wire \op[2]~input_o ;
wire \Mux3~1_combout ;
wire \Mux3~0_combout ;
wire \B[0]~input_o ;
wire \A[0]~input_o ;
wire \Mux3~3_combout ;
wire \B[3]~input_o ;
wire \A[3]~input_o ;
wire \Mux3~2_combout ;
wire \B[2]~input_o ;
wire \A[2]~input_o ;
wire \A[1]~input_o ;
wire \B[1]~input_o ;
wire \adder_unit|_~1 ;
wire \adder_unit|_~2 ;
wire \adder_unit|_~7 ;
wire \adder_unit|_~8 ;
wire \adder_unit|_~10 ;
wire \adder_unit|_~11 ;
wire \adder_unit|_~13 ;
wire \adder_unit|_~14 ;
wire \Mux3~4_combout ;
wire \Mux2~0_combout ;
wire \Mux1~0_combout ;
wire \Mux0~0_combout ;
wire \dut|Mux5~0_combout ;
wire \dut|Mux4~0_combout ;
wire \dut|Mux3~0_combout ;
wire \dut|Mux2~0_combout ;
wire \dut|Mux1~0_combout ;
wire \dut|Mux0~0_combout ;
wire \dut|WideOr0~0_combout ;
wire [0:0] \adder_unit|OUT_CIN ;
wire [3:0] \adder_unit|OUT_1 ;
wire [0:0] \adder_unit|COUT ;


// Location: IOOBUF_X14_Y61_N53
cyclonev_io_obuf \OUT_1[0]~output (
	.i(\Mux3~4_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(OUT_1[0]),
	.obar());
// synopsys translate_off
defparam \OUT_1[0]~output .bus_hold = "false";
defparam \OUT_1[0]~output .open_drain_output = "false";
defparam \OUT_1[0]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X15_Y61_N36
cyclonev_io_obuf \OUT_1[1]~output (
	.i(\Mux2~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(OUT_1[1]),
	.obar());
// synopsys translate_off
defparam \OUT_1[1]~output .bus_hold = "false";
defparam \OUT_1[1]~output .open_drain_output = "false";
defparam \OUT_1[1]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X15_Y61_N53
cyclonev_io_obuf \OUT_1[2]~output (
	.i(\Mux1~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(OUT_1[2]),
	.obar());
// synopsys translate_off
defparam \OUT_1[2]~output .bus_hold = "false";
defparam \OUT_1[2]~output .open_drain_output = "false";
defparam \OUT_1[2]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X14_Y61_N36
cyclonev_io_obuf \OUT_1[3]~output (
	.i(\Mux0~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(OUT_1[3]),
	.obar());
// synopsys translate_off
defparam \OUT_1[3]~output .bus_hold = "false";
defparam \OUT_1[3]~output .open_drain_output = "false";
defparam \OUT_1[3]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X12_Y61_N36
cyclonev_io_obuf \flags[0]~output (
	.i(\adder_unit|COUT [0]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(flags[0]),
	.obar());
// synopsys translate_off
defparam \flags[0]~output .bus_hold = "false";
defparam \flags[0]~output .open_drain_output = "false";
defparam \flags[0]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X12_Y61_N19
cyclonev_io_obuf \flags[1]~output (
	.i(\adder_unit|OUT_CIN [0]),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(flags[1]),
	.obar());
// synopsys translate_off
defparam \flags[1]~output .bus_hold = "false";
defparam \flags[1]~output .open_drain_output = "false";
defparam \flags[1]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X68_Y37_N5
cyclonev_io_obuf \out_seg1[0]~output (
	.i(gnd),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[0]),
	.obar());
// synopsys translate_off
defparam \out_seg1[0]~output .bus_hold = "false";
defparam \out_seg1[0]~output .open_drain_output = "false";
defparam \out_seg1[0]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X66_Y0_N2
cyclonev_io_obuf \out_seg1[1]~output (
	.i(\dut|Mux5~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[1]),
	.obar());
// synopsys translate_off
defparam \out_seg1[1]~output .bus_hold = "false";
defparam \out_seg1[1]~output .open_drain_output = "false";
defparam \out_seg1[1]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X64_Y0_N2
cyclonev_io_obuf \out_seg1[2]~output (
	.i(\dut|Mux4~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[2]),
	.obar());
// synopsys translate_off
defparam \out_seg1[2]~output .bus_hold = "false";
defparam \out_seg1[2]~output .open_drain_output = "false";
defparam \out_seg1[2]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X64_Y0_N19
cyclonev_io_obuf \out_seg1[3]~output (
	.i(\dut|Mux3~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[3]),
	.obar());
// synopsys translate_off
defparam \out_seg1[3]~output .bus_hold = "false";
defparam \out_seg1[3]~output .open_drain_output = "false";
defparam \out_seg1[3]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X66_Y0_N19
cyclonev_io_obuf \out_seg1[4]~output (
	.i(\dut|Mux2~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[4]),
	.obar());
// synopsys translate_off
defparam \out_seg1[4]~output .bus_hold = "false";
defparam \out_seg1[4]~output .open_drain_output = "false";
defparam \out_seg1[4]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X65_Y0_N2
cyclonev_io_obuf \out_seg1[5]~output (
	.i(\dut|Mux1~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[5]),
	.obar());
// synopsys translate_off
defparam \out_seg1[5]~output .bus_hold = "false";
defparam \out_seg1[5]~output .open_drain_output = "false";
defparam \out_seg1[5]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X65_Y0_N19
cyclonev_io_obuf \out_seg1[6]~output (
	.i(\dut|Mux0~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[6]),
	.obar());
// synopsys translate_off
defparam \out_seg1[6]~output .bus_hold = "false";
defparam \out_seg1[6]~output .open_drain_output = "false";
defparam \out_seg1[6]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOOBUF_X62_Y0_N42
cyclonev_io_obuf \out_seg1[7]~output (
	.i(!\dut|WideOr0~0_combout ),
	.oe(vcc),
	.dynamicterminationcontrol(gnd),
	.seriesterminationcontrol(16'b0000000000000000),
	.parallelterminationcontrol(16'b0000000000000000),
	.devoe(devoe),
	.o(out_seg1[7]),
	.obar());
// synopsys translate_off
defparam \out_seg1[7]~output .bus_hold = "false";
defparam \out_seg1[7]~output .open_drain_output = "false";
defparam \out_seg1[7]~output .shift_series_termination_control = "false";
// synopsys translate_on

// Location: IOIBUF_X50_Y0_N35
cyclonev_io_ibuf \op[3]~input (
	.i(op[3]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\op[3]~input_o ));
// synopsys translate_off
defparam \op[3]~input .bus_hold = "false";
defparam \op[3]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X12_Y0_N52
cyclonev_io_ibuf \op[1]~input (
	.i(op[1]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\op[1]~input_o ));
// synopsys translate_off
defparam \op[1]~input .bus_hold = "false";
defparam \op[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X17_Y0_N75
cyclonev_io_ibuf \op[0]~input (
	.i(op[0]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\op[0]~input_o ));
// synopsys translate_off
defparam \op[0]~input .bus_hold = "false";
defparam \op[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X10_Y0_N58
cyclonev_io_ibuf \op[2]~input (
	.i(op[2]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\op[2]~input_o ));
// synopsys translate_off
defparam \op[2]~input .bus_hold = "false";
defparam \op[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N18
cyclonev_lcell_comb \Mux3~1 (
// Equation(s):
// \Mux3~1_combout  = ( !\op[2]~input_o  & ( (\op[3]~input_o  & (\op[1]~input_o  & \op[0]~input_o )) ) )

	.dataa(gnd),
	.datab(!\op[3]~input_o ),
	.datac(!\op[1]~input_o ),
	.datad(!\op[0]~input_o ),
	.datae(gnd),
	.dataf(!\op[2]~input_o ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux3~1_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux3~1 .extended_lut = "off";
defparam \Mux3~1 .lut_mask = 64'h0003000300000000;
defparam \Mux3~1 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X22_Y1_N3
cyclonev_lcell_comb \Mux3~0 (
// Equation(s):
// \Mux3~0_combout  = ( !\op[3]~input_o  & ( !\op[2]~input_o  ) )

	.dataa(gnd),
	.datab(gnd),
	.datac(!\op[2]~input_o ),
	.datad(gnd),
	.datae(!\op[3]~input_o ),
	.dataf(gnd),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux3~0 .extended_lut = "off";
defparam \Mux3~0 .lut_mask = 64'hF0F00000F0F00000;
defparam \Mux3~0 .shared_arith = "off";
// synopsys translate_on

// Location: IOIBUF_X14_Y0_N35
cyclonev_io_ibuf \B[0]~input (
	.i(B[0]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\B[0]~input_o ));
// synopsys translate_off
defparam \B[0]~input .bus_hold = "false";
defparam \B[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X21_Y0_N1
cyclonev_io_ibuf \A[0]~input (
	.i(A[0]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\A[0]~input_o ));
// synopsys translate_off
defparam \A[0]~input .bus_hold = "false";
defparam \A[0]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N48
cyclonev_lcell_comb \Mux3~3 (
// Equation(s):
// \Mux3~3_combout  = ( !\op[3]~input_o  & ( \A[0]~input_o  & ( (\op[2]~input_o  & (!\op[1]~input_o  $ (((!\op[0]~input_o  & !\B[0]~input_o ))))) ) ) ) # ( !\op[3]~input_o  & ( !\A[0]~input_o  & ( (\op[2]~input_o  & ((!\op[0]~input_o  & (\op[1]~input_o  & 
// \B[0]~input_o )) # (\op[0]~input_o  & (!\op[1]~input_o  $ (!\B[0]~input_o ))))) ) ) )

	.dataa(!\op[0]~input_o ),
	.datab(!\op[2]~input_o ),
	.datac(!\op[1]~input_o ),
	.datad(!\B[0]~input_o ),
	.datae(!\op[3]~input_o ),
	.dataf(!\A[0]~input_o ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux3~3_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux3~3 .extended_lut = "off";
defparam \Mux3~3 .lut_mask = 64'h0112000012300000;
defparam \Mux3~3 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N30
cyclonev_lcell_comb \adder_unit|OUT_1[0] (
// Equation(s):
// \adder_unit|OUT_1 [0] = SUM(( !\B[0]~input_o  $ (!\A[0]~input_o ) ) + ( !VCC ) + ( !VCC ))
// \adder_unit|_~1  = CARRY(( !\B[0]~input_o  $ (!\A[0]~input_o ) ) + ( !VCC ) + ( !VCC ))
// \adder_unit|_~2  = SHARE((\B[0]~input_o  & \A[0]~input_o ))

	.dataa(gnd),
	.datab(!\B[0]~input_o ),
	.datac(!\A[0]~input_o ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(),
	.sumout(\adder_unit|OUT_1 [0]),
	.cout(\adder_unit|_~1 ),
	.shareout(\adder_unit|_~2 ));
// synopsys translate_off
defparam \adder_unit|OUT_1[0] .extended_lut = "off";
defparam \adder_unit|OUT_1[0] .lut_mask = 64'h0000030300003C3C;
defparam \adder_unit|OUT_1[0] .shared_arith = "on";
// synopsys translate_on

// Location: IOIBUF_X14_Y0_N52
cyclonev_io_ibuf \B[3]~input (
	.i(B[3]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\B[3]~input_o ));
// synopsys translate_off
defparam \B[3]~input .bus_hold = "false";
defparam \B[3]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X46_Y0_N18
cyclonev_io_ibuf \A[3]~input (
	.i(A[3]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\A[3]~input_o ));
// synopsys translate_off
defparam \A[3]~input .bus_hold = "false";
defparam \A[3]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N54
cyclonev_lcell_comb \Mux3~2 (
// Equation(s):
// \Mux3~2_combout  = ( \op[3]~input_o  & ( \A[3]~input_o  & ( (!\B[3]~input_o  & (!\op[2]~input_o  & (\op[1]~input_o  & !\op[0]~input_o ))) ) ) ) # ( \op[3]~input_o  & ( !\A[3]~input_o  & ( (\B[3]~input_o  & (!\op[2]~input_o  & (\op[1]~input_o  & 
// !\op[0]~input_o ))) ) ) )

	.dataa(!\B[3]~input_o ),
	.datab(!\op[2]~input_o ),
	.datac(!\op[1]~input_o ),
	.datad(!\op[0]~input_o ),
	.datae(!\op[3]~input_o ),
	.dataf(!\A[3]~input_o ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux3~2_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux3~2 .extended_lut = "off";
defparam \Mux3~2 .lut_mask = 64'h0000040000000800;
defparam \Mux3~2 .shared_arith = "off";
// synopsys translate_on

// Location: IOIBUF_X34_Y0_N35
cyclonev_io_ibuf \B[2]~input (
	.i(B[2]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\B[2]~input_o ));
// synopsys translate_off
defparam \B[2]~input .bus_hold = "false";
defparam \B[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X46_Y0_N1
cyclonev_io_ibuf \A[2]~input (
	.i(A[2]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\A[2]~input_o ));
// synopsys translate_off
defparam \A[2]~input .bus_hold = "false";
defparam \A[2]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X21_Y0_N18
cyclonev_io_ibuf \A[1]~input (
	.i(A[1]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\A[1]~input_o ));
// synopsys translate_off
defparam \A[1]~input .bus_hold = "false";
defparam \A[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: IOIBUF_X36_Y0_N52
cyclonev_io_ibuf \B[1]~input (
	.i(B[1]),
	.ibar(gnd),
	.dynamicterminationcontrol(gnd),
	.o(\B[1]~input_o ));
// synopsys translate_off
defparam \B[1]~input .bus_hold = "false";
defparam \B[1]~input .simulate_z_as = "z";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N33
cyclonev_lcell_comb \adder_unit|OUT_1[1] (
// Equation(s):
// \adder_unit|OUT_1 [1] = SUM(( !\A[1]~input_o  $ (!\B[1]~input_o ) ) + ( \adder_unit|_~2  ) + ( \adder_unit|_~1  ))
// \adder_unit|_~7  = CARRY(( !\A[1]~input_o  $ (!\B[1]~input_o ) ) + ( \adder_unit|_~2  ) + ( \adder_unit|_~1  ))
// \adder_unit|_~8  = SHARE((\A[1]~input_o  & \B[1]~input_o ))

	.dataa(!\A[1]~input_o ),
	.datab(gnd),
	.datac(gnd),
	.datad(!\B[1]~input_o ),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.cin(\adder_unit|_~1 ),
	.sharein(\adder_unit|_~2 ),
	.combout(),
	.sumout(\adder_unit|OUT_1 [1]),
	.cout(\adder_unit|_~7 ),
	.shareout(\adder_unit|_~8 ));
// synopsys translate_off
defparam \adder_unit|OUT_1[1] .extended_lut = "off";
defparam \adder_unit|OUT_1[1] .lut_mask = 64'h00000055000055AA;
defparam \adder_unit|OUT_1[1] .shared_arith = "on";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N36
cyclonev_lcell_comb \adder_unit|OUT_1[2] (
// Equation(s):
// \adder_unit|OUT_1 [2] = SUM(( !\B[2]~input_o  $ (!\A[2]~input_o ) ) + ( \adder_unit|_~8  ) + ( \adder_unit|_~7  ))
// \adder_unit|_~10  = CARRY(( !\B[2]~input_o  $ (!\A[2]~input_o ) ) + ( \adder_unit|_~8  ) + ( \adder_unit|_~7  ))
// \adder_unit|_~11  = SHARE((\B[2]~input_o  & \A[2]~input_o ))

	.dataa(gnd),
	.datab(!\B[2]~input_o ),
	.datac(!\A[2]~input_o ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.cin(\adder_unit|_~7 ),
	.sharein(\adder_unit|_~8 ),
	.combout(),
	.sumout(\adder_unit|OUT_1 [2]),
	.cout(\adder_unit|_~10 ),
	.shareout(\adder_unit|_~11 ));
// synopsys translate_off
defparam \adder_unit|OUT_1[2] .extended_lut = "off";
defparam \adder_unit|OUT_1[2] .lut_mask = 64'h0000030300003C3C;
defparam \adder_unit|OUT_1[2] .shared_arith = "on";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N39
cyclonev_lcell_comb \adder_unit|OUT_1[3] (
// Equation(s):
// \adder_unit|OUT_1 [3] = SUM(( !\B[3]~input_o  $ (!\A[3]~input_o ) ) + ( \adder_unit|_~11  ) + ( \adder_unit|_~10  ))
// \adder_unit|_~13  = CARRY(( !\B[3]~input_o  $ (!\A[3]~input_o ) ) + ( \adder_unit|_~11  ) + ( \adder_unit|_~10  ))
// \adder_unit|_~14  = SHARE((\B[3]~input_o  & \A[3]~input_o ))

	.dataa(!\B[3]~input_o ),
	.datab(gnd),
	.datac(!\A[3]~input_o ),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.cin(\adder_unit|_~10 ),
	.sharein(\adder_unit|_~11 ),
	.combout(),
	.sumout(\adder_unit|OUT_1 [3]),
	.cout(\adder_unit|_~13 ),
	.shareout(\adder_unit|_~14 ));
// synopsys translate_off
defparam \adder_unit|OUT_1[3] .extended_lut = "off";
defparam \adder_unit|OUT_1[3] .lut_mask = 64'h0000050500005A5A;
defparam \adder_unit|OUT_1[3] .shared_arith = "on";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N42
cyclonev_lcell_comb \adder_unit|COUT[0] (
// Equation(s):
// \adder_unit|COUT [0] = SUM(( GND ) + ( \adder_unit|_~14  ) + ( \adder_unit|_~13  ))

	.dataa(gnd),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.cin(\adder_unit|_~13 ),
	.sharein(\adder_unit|_~14 ),
	.combout(),
	.sumout(\adder_unit|COUT [0]),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \adder_unit|COUT[0] .extended_lut = "off";
defparam \adder_unit|COUT[0] .lut_mask = 64'h0000000000000000;
defparam \adder_unit|COUT[0] .shared_arith = "on";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N24
cyclonev_lcell_comb \Mux3~4 (
// Equation(s):
// \Mux3~4_combout  = ( \Mux3~2_combout  & ( \adder_unit|COUT [0] ) ) # ( !\Mux3~2_combout  & ( \adder_unit|COUT [0] & ( ((\Mux3~0_combout  & \adder_unit|OUT_1 [0])) # (\Mux3~3_combout ) ) ) ) # ( \Mux3~2_combout  & ( !\adder_unit|COUT [0] ) ) # ( 
// !\Mux3~2_combout  & ( !\adder_unit|COUT [0] & ( (((\Mux3~0_combout  & \adder_unit|OUT_1 [0])) # (\Mux3~3_combout )) # (\Mux3~1_combout ) ) ) )

	.dataa(!\Mux3~1_combout ),
	.datab(!\Mux3~0_combout ),
	.datac(!\Mux3~3_combout ),
	.datad(!\adder_unit|OUT_1 [0]),
	.datae(!\Mux3~2_combout ),
	.dataf(!\adder_unit|COUT [0]),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux3~4_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux3~4 .extended_lut = "off";
defparam \Mux3~4 .lut_mask = 64'h5F7FFFFF0F3FFFFF;
defparam \Mux3~4 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N12
cyclonev_lcell_comb \Mux2~0 (
// Equation(s):
// \Mux2~0_combout  = ( !\op[2]~input_o  & ( (((\adder_unit|OUT_1 [1] & (!\op[3]~input_o )))) ) ) # ( \op[2]~input_o  & ( (!\op[3]~input_o  & ((!\B[1]~input_o  & ((!\op[0]~input_o  & (\A[1]~input_o  & \op[1]~input_o )) # (\op[0]~input_o  & (!\A[1]~input_o  $ 
// (!\op[1]~input_o ))))) # (\B[1]~input_o  & (!\op[1]~input_o  $ (((!\op[0]~input_o  & !\A[1]~input_o ))))))) ) )

	.dataa(!\B[1]~input_o ),
	.datab(!\op[0]~input_o ),
	.datac(!\A[1]~input_o ),
	.datad(!\op[3]~input_o ),
	.datae(!\op[2]~input_o ),
	.dataf(!\op[1]~input_o ),
	.datag(!\adder_unit|OUT_1 [1]),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux2~0 .extended_lut = "on";
defparam \Mux2~0 .lut_mask = 64'h0F0017000F006800;
defparam \Mux2~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N6
cyclonev_lcell_comb \Mux1~0 (
// Equation(s):
// \Mux1~0_combout  = ( !\op[2]~input_o  & ( ((!\op[3]~input_o  & (\adder_unit|OUT_1 [2]))) ) ) # ( \op[2]~input_o  & ( (!\op[3]~input_o  & ((!\A[2]~input_o  & ((!\op[1]~input_o  & (\B[2]~input_o  & \op[0]~input_o )) # (\op[1]~input_o  & (!\B[2]~input_o  $ 
// (!\op[0]~input_o ))))) # (\A[2]~input_o  & (!\op[1]~input_o  $ (((!\B[2]~input_o  & !\op[0]~input_o ))))))) ) )

	.dataa(!\op[1]~input_o ),
	.datab(!\op[3]~input_o ),
	.datac(!\A[2]~input_o ),
	.datad(!\B[2]~input_o ),
	.datae(!\op[2]~input_o ),
	.dataf(!\op[0]~input_o ),
	.datag(!\adder_unit|OUT_1 [2]),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux1~0 .extended_lut = "on";
defparam \Mux1~0 .lut_mask = 64'h0C0C04480C0C4888;
defparam \Mux1~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N0
cyclonev_lcell_comb \Mux0~0 (
// Equation(s):
// \Mux0~0_combout  = ( !\op[2]~input_o  & ( (((\adder_unit|OUT_1 [3] & (!\op[3]~input_o )))) ) ) # ( \op[2]~input_o  & ( (!\op[3]~input_o  & ((!\B[3]~input_o  & ((!\op[0]~input_o  & (\A[3]~input_o  & \op[1]~input_o )) # (\op[0]~input_o  & (!\A[3]~input_o  $ 
// (!\op[1]~input_o ))))) # (\B[3]~input_o  & (!\op[1]~input_o  $ (((!\op[0]~input_o  & !\A[3]~input_o ))))))) ) )

	.dataa(!\B[3]~input_o ),
	.datab(!\op[0]~input_o ),
	.datac(!\A[3]~input_o ),
	.datad(!\op[3]~input_o ),
	.datae(!\op[2]~input_o ),
	.dataf(!\op[1]~input_o ),
	.datag(!\adder_unit|OUT_1 [3]),
	.cin(gnd),
	.sharein(gnd),
	.combout(\Mux0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \Mux0~0 .extended_lut = "on";
defparam \Mux0~0 .lut_mask = 64'h0F0017000F006800;
defparam \Mux0~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X23_Y1_N21
cyclonev_lcell_comb \adder_unit|OUT_CIN[0] (
// Equation(s):
// \adder_unit|OUT_CIN [0] = ( \A[3]~input_o  & ( !\B[3]~input_o  $ (\adder_unit|OUT_1 [3]) ) ) # ( !\A[3]~input_o  & ( !\B[3]~input_o  $ (!\adder_unit|OUT_1 [3]) ) )

	.dataa(!\B[3]~input_o ),
	.datab(gnd),
	.datac(!\adder_unit|OUT_1 [3]),
	.datad(gnd),
	.datae(gnd),
	.dataf(!\A[3]~input_o ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\adder_unit|OUT_CIN [0]),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \adder_unit|OUT_CIN[0] .extended_lut = "off";
defparam \adder_unit|OUT_CIN[0] .lut_mask = 64'h5A5A5A5AA5A5A5A5;
defparam \adder_unit|OUT_CIN[0] .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N33
cyclonev_lcell_comb \dut|Mux5~0 (
// Equation(s):
// \dut|Mux5~0_combout  = ( \Mux0~0_combout  & ( (\Mux3~4_combout  & (!\Mux2~0_combout  $ (!\Mux1~0_combout ))) ) ) # ( !\Mux0~0_combout  & ( (!\Mux2~0_combout  & (!\Mux1~0_combout  $ (!\Mux3~4_combout ))) ) )

	.dataa(!\Mux2~0_combout ),
	.datab(!\Mux1~0_combout ),
	.datac(!\Mux3~4_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|Mux5~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|Mux5~0 .extended_lut = "off";
defparam \dut|Mux5~0 .lut_mask = 64'h2828282806060606;
defparam \dut|Mux5~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N36
cyclonev_lcell_comb \dut|Mux4~0 (
// Equation(s):
// \dut|Mux4~0_combout  = ( \Mux0~0_combout  & ( (!\Mux3~4_combout  & ((\Mux1~0_combout ))) # (\Mux3~4_combout  & (\Mux2~0_combout )) ) ) # ( !\Mux0~0_combout  & ( (\Mux1~0_combout  & (!\Mux3~4_combout  $ (!\Mux2~0_combout ))) ) )

	.dataa(gnd),
	.datab(!\Mux3~4_combout ),
	.datac(!\Mux2~0_combout ),
	.datad(!\Mux1~0_combout ),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|Mux4~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|Mux4~0 .extended_lut = "off";
defparam \dut|Mux4~0 .lut_mask = 64'h003C003C03CF03CF;
defparam \dut|Mux4~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N12
cyclonev_lcell_comb \dut|Mux3~0 (
// Equation(s):
// \dut|Mux3~0_combout  = ( \Mux0~0_combout  & ( (\Mux1~0_combout  & ((!\Mux3~4_combout ) # (\Mux2~0_combout ))) ) ) # ( !\Mux0~0_combout  & ( (!\Mux3~4_combout  & (\Mux2~0_combout  & !\Mux1~0_combout )) ) )

	.dataa(gnd),
	.datab(!\Mux3~4_combout ),
	.datac(!\Mux2~0_combout ),
	.datad(!\Mux1~0_combout ),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|Mux3~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|Mux3~0 .extended_lut = "off";
defparam \dut|Mux3~0 .lut_mask = 64'h0C000C0000CF00CF;
defparam \dut|Mux3~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N21
cyclonev_lcell_comb \dut|Mux2~0 (
// Equation(s):
// \dut|Mux2~0_combout  = ( \Mux0~0_combout  & ( (!\Mux2~0_combout  & (!\Mux1~0_combout  & \Mux3~4_combout )) # (\Mux2~0_combout  & (!\Mux1~0_combout  $ (\Mux3~4_combout ))) ) ) # ( !\Mux0~0_combout  & ( (!\Mux2~0_combout  & (!\Mux1~0_combout  $ 
// (!\Mux3~4_combout ))) # (\Mux2~0_combout  & (\Mux1~0_combout  & \Mux3~4_combout )) ) )

	.dataa(!\Mux2~0_combout ),
	.datab(!\Mux1~0_combout ),
	.datac(!\Mux3~4_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|Mux2~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|Mux2~0 .extended_lut = "off";
defparam \dut|Mux2~0 .lut_mask = 64'h2929292949494949;
defparam \dut|Mux2~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N54
cyclonev_lcell_comb \dut|Mux1~0 (
// Equation(s):
// \dut|Mux1~0_combout  = ( \Mux0~0_combout  & ( (\Mux3~4_combout  & (!\Mux2~0_combout  & !\Mux1~0_combout )) ) ) # ( !\Mux0~0_combout  & ( ((!\Mux2~0_combout  & \Mux1~0_combout )) # (\Mux3~4_combout ) ) )

	.dataa(gnd),
	.datab(!\Mux3~4_combout ),
	.datac(!\Mux2~0_combout ),
	.datad(!\Mux1~0_combout ),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|Mux1~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|Mux1~0 .extended_lut = "off";
defparam \dut|Mux1~0 .lut_mask = 64'h33F333F330003000;
defparam \dut|Mux1~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N3
cyclonev_lcell_comb \dut|Mux0~0 (
// Equation(s):
// \dut|Mux0~0_combout  = ( \Mux0~0_combout  & ( (!\Mux2~0_combout  & (\Mux1~0_combout  & \Mux3~4_combout )) ) ) # ( !\Mux0~0_combout  & ( (!\Mux2~0_combout  & (!\Mux1~0_combout  & \Mux3~4_combout )) # (\Mux2~0_combout  & ((!\Mux1~0_combout ) # 
// (\Mux3~4_combout ))) ) )

	.dataa(!\Mux2~0_combout ),
	.datab(!\Mux1~0_combout ),
	.datac(!\Mux3~4_combout ),
	.datad(gnd),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|Mux0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|Mux0~0 .extended_lut = "off";
defparam \dut|Mux0~0 .lut_mask = 64'h4D4D4D4D02020202;
defparam \dut|Mux0~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X53_Y1_N6
cyclonev_lcell_comb \dut|WideOr0~0 (
// Equation(s):
// \dut|WideOr0~0_combout  = ( \Mux0~0_combout  & ( ((!\Mux1~0_combout ) # (\Mux2~0_combout )) # (\Mux3~4_combout ) ) ) # ( !\Mux0~0_combout  & ( (!\Mux2~0_combout  & ((\Mux1~0_combout ))) # (\Mux2~0_combout  & ((!\Mux3~4_combout ) # (!\Mux1~0_combout ))) ) 
// )

	.dataa(gnd),
	.datab(!\Mux3~4_combout ),
	.datac(!\Mux2~0_combout ),
	.datad(!\Mux1~0_combout ),
	.datae(gnd),
	.dataf(!\Mux0~0_combout ),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\dut|WideOr0~0_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \dut|WideOr0~0 .extended_lut = "off";
defparam \dut|WideOr0~0 .lut_mask = 64'h0FFC0FFCFF3FFF3F;
defparam \dut|WideOr0~0 .shared_arith = "off";
// synopsys translate_on

// Location: LABCELL_X27_Y18_N3
cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I (
// Equation(s):

	.dataa(gnd),
	.datab(gnd),
	.datac(gnd),
	.datad(gnd),
	.datae(gnd),
	.dataf(gnd),
	.datag(gnd),
	.cin(gnd),
	.sharein(gnd),
	.combout(\~QUARTUS_CREATED_GND~I_combout ),
	.sumout(),
	.cout(),
	.shareout());
// synopsys translate_off
defparam \~QUARTUS_CREATED_GND~I .extended_lut = "off";
defparam \~QUARTUS_CREATED_GND~I .lut_mask = 64'h0000000000000000;
defparam \~QUARTUS_CREATED_GND~I .shared_arith = "off";
// synopsys translate_on

endmodule