|shifter
op[0] => Mux0.IN8
op[0] => Mux1.IN8
op[0] => Mux2.IN8
op[0] => Mux3.IN8
op[1] => Mux0.IN7
op[1] => Mux1.IN7
op[1] => Mux2.IN7
op[1] => Mux3.IN7
op[2] => Mux0.IN6
op[2] => Mux1.IN6
op[2] => Mux2.IN6
op[2] => Mux3.IN6
A[0] => ShiftLeft0.IN4
A[0] => ShiftRight0.IN4
A[0] => ShiftRight1.IN4
A[0] => ShiftLeft1.IN4
A[0] => ShiftRight2.IN4
A[0] => ShiftRight3.IN4
A[0] => Mux3.IN9
A[0] => Mux3.IN10
A[1] => ShiftLeft0.IN3
A[1] => ShiftRight0.IN3
A[1] => ShiftRight1.IN3
A[1] => ShiftLeft1.IN3
A[1] => ShiftRight2.IN3
A[1] => ShiftRight3.IN3
A[1] => Mux2.IN9
A[1] => Mux2.IN10
A[2] => ShiftLeft0.IN2
A[2] => ShiftRight0.IN2
A[2] => ShiftRight1.IN2
A[2] => ShiftLeft1.IN2
A[2] => ShiftRight2.IN2
A[2] => ShiftRight3.IN2
A[2] => Mux1.IN9
A[2] => Mux1.IN10
A[3] => ShiftLeft0.IN1
A[3] => ShiftRight0.IN1
A[3] => ShiftRight1.IN0
A[3] => ShiftRight1.IN1
A[3] => ShiftLeft1.IN1
A[3] => ShiftRight2.IN1
A[3] => ShiftRight3.IN0
A[3] => ShiftRight3.IN1
A[3] => Mux0.IN9
A[3] => Mux0.IN10
B[0] => ShiftLeft1.IN8
B[0] => ShiftRight2.IN8
B[0] => ShiftRight3.IN8
B[1] => ShiftLeft1.IN7
B[1] => ShiftRight2.IN7
B[1] => ShiftRight3.IN7
B[2] => ShiftLeft1.IN6
B[2] => ShiftRight2.IN6
B[2] => ShiftRight3.IN6
B[3] => ShiftLeft1.IN5
B[3] => ShiftRight2.IN5
B[3] => ShiftRight3.IN5
C[0] => ShiftLeft0.IN6
C[0] => ShiftRight0.IN6
C[0] => ShiftRight1.IN6
C[1] => ShiftLeft0.IN5
C[1] => ShiftRight0.IN5
C[1] => ShiftRight1.IN5
OUT_1[0] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
OUT_1[1] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
OUT_1[2] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
OUT_1[3] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE