// Copyright (C) 2025 Altera Corporation. All rights reserved. // Your use of Altera Corporation's design tools, logic functions // and other software and tools, and any partner logic // functions, and any output files from any of the foregoing // (including device programming or simulation files), and any // associated documentation or information are expressly subject // to the terms and conditions of the Altera Program License // Subscription Agreement, the Altera Quartus Prime License Agreement, // the Altera IP License Agreement, or other applicable license // agreement, including, without limitation, that your use is for // the sole purpose of programming logic devices manufactured by // Altera and sold by Altera or its authorized distributors. Please // refer to the Altera Software License Subscription Agreements // on the Quartus Prime software download page. // VENDOR "Altera" // PROGRAM "Quartus Prime" // VERSION "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" // DATE "10/16/2026 09:59:05" // // Device: Altera 5CGXFC5C6F27C7 Package FBGA672 // // // This Verilog file should be used for Questa Altera FPGA (SystemVerilog) only // `timescale 1 ps/ 1 ps module assignment2 ( clk, HID_Register, HID_PC, HID_Hi_Low, out_seg_0, out_seg_1, out_seg_2, out_seg_3); input [0:0] clk; input [4:0] HID_Register; input [0:0] HID_PC; input [0:0] HID_Hi_Low; output [7:0] out_seg_0; output [7:0] out_seg_1; output [7:0] out_seg_2; output [7:0] out_seg_3; // Design Ports Information // HID_PC[0] => Location: PIN_W11, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[0] => Location: PIN_J25, I/O Standard: 2.5 V, Current Strength: Default // out_seg_0[1] => Location: PIN_V19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[2] => Location: PIN_V18, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[3] => Location: PIN_V17, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[4] => Location: PIN_W18, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[5] => Location: PIN_Y20, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[6] => Location: PIN_Y19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[7] => Location: PIN_Y18, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[0] => Location: PIN_D7, I/O Standard: 2.5 V, Current Strength: Default // out_seg_1[1] => Location: PIN_AA18, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[2] => Location: PIN_AD26, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[3] => Location: PIN_AB19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[4] => Location: PIN_AE26, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[5] => Location: PIN_AE25, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[6] => Location: PIN_AC19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[7] => Location: PIN_AF24, I/O Standard: 1.2 V, Current Strength: Default // out_seg_2[0] => Location: PIN_H18, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[1] => Location: PIN_AD7, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[2] => Location: PIN_AD6, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[3] => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[4] => Location: PIN_V22, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[5] => Location: PIN_V20, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[6] => Location: PIN_W21, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[7] => Location: PIN_W20, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[0] => Location: PIN_H14, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[1] => Location: PIN_Y24, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[2] => Location: PIN_Y23, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[3] => Location: PIN_AA23, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[4] => Location: PIN_AA22, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[5] => Location: PIN_AC24, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[6] => Location: PIN_AC23, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[7] => Location: PIN_AC22, I/O Standard: 2.5 V, Current Strength: Default // HID_Hi_Low[0] => Location: PIN_AC8, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[4] => Location: PIN_AE19, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[2] => Location: PIN_AC10, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[0] => Location: PIN_AB10, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[1] => Location: PIN_V10, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[3] => Location: PIN_Y11, I/O Standard: 1.2 V, Current Strength: Default // clk[0] => Location: PIN_Y16, I/O Standard: 1.2 V, Current Strength: Default wire gnd; wire vcc; wire unknown; assign gnd = 1'b0; assign vcc = 1'b1; assign unknown = 1'bx; tri1 devclrn; tri1 devpor; tri1 devoe; wire \HID_PC[0]~input_o ; wire \HID_Hi_Low[0]~input_o ; wire \HID_Register[4]~input_o ; wire \HID_Register[2]~input_o ; wire \HID_Register[0]~input_o ; wire \HID_Register[1]~input_o ; wire \HID_Register[3]~input_o ; wire \clk[0]~input_o ; wire \~QUARTUS_CREATED_GND~I_combout ; // Location: IOOBUF_X68_Y32_N79 cyclonev_io_obuf \out_seg_0[0]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[0]), .obar()); // synopsys translate_off defparam \out_seg_0[0]~output .bus_hold = "false"; defparam \out_seg_0[0]~output .open_drain_output = "false"; defparam \out_seg_0[0]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X66_Y0_N2 cyclonev_io_obuf \out_seg_0[1]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[1]), .obar()); // synopsys translate_off defparam \out_seg_0[1]~output .bus_hold = "false"; defparam \out_seg_0[1]~output .open_drain_output = "false"; defparam \out_seg_0[1]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X64_Y0_N2 cyclonev_io_obuf \out_seg_0[2]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[2]), .obar()); // synopsys translate_off defparam \out_seg_0[2]~output .bus_hold = "false"; defparam \out_seg_0[2]~output .open_drain_output = "false"; defparam \out_seg_0[2]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X64_Y0_N19 cyclonev_io_obuf \out_seg_0[3]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[3]), .obar()); // synopsys translate_off defparam \out_seg_0[3]~output .bus_hold = "false"; defparam \out_seg_0[3]~output .open_drain_output = "false"; defparam \out_seg_0[3]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X66_Y0_N19 cyclonev_io_obuf \out_seg_0[4]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[4]), .obar()); // synopsys translate_off defparam \out_seg_0[4]~output .bus_hold = "false"; defparam \out_seg_0[4]~output .open_drain_output = "false"; defparam \out_seg_0[4]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X65_Y0_N2 cyclonev_io_obuf \out_seg_0[5]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[5]), .obar()); // synopsys translate_off defparam \out_seg_0[5]~output .bus_hold = "false"; defparam \out_seg_0[5]~output .open_drain_output = "false"; defparam \out_seg_0[5]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X65_Y0_N19 cyclonev_io_obuf \out_seg_0[6]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[6]), .obar()); // synopsys translate_off defparam \out_seg_0[6]~output .bus_hold = "false"; defparam \out_seg_0[6]~output .open_drain_output = "false"; defparam \out_seg_0[6]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X62_Y0_N42 cyclonev_io_obuf \out_seg_0[7]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_0[7]), .obar()); // synopsys translate_off defparam \out_seg_0[7]~output .bus_hold = "false"; defparam \out_seg_0[7]~output .open_drain_output = "false"; defparam \out_seg_0[7]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X17_Y61_N76 cyclonev_io_obuf \out_seg_1[0]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[0]), .obar()); // synopsys translate_off defparam \out_seg_1[0]~output .bus_hold = "false"; defparam \out_seg_1[0]~output .open_drain_output = "false"; defparam \out_seg_1[0]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X62_Y0_N59 cyclonev_io_obuf \out_seg_1[1]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[1]), .obar()); // synopsys translate_off defparam \out_seg_1[1]~output .bus_hold = "false"; defparam \out_seg_1[1]~output .open_drain_output = "false"; defparam \out_seg_1[1]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X64_Y0_N36 cyclonev_io_obuf \out_seg_1[2]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[2]), .obar()); // synopsys translate_off defparam \out_seg_1[2]~output .bus_hold = "false"; defparam \out_seg_1[2]~output .open_drain_output = "false"; defparam \out_seg_1[2]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X65_Y0_N36 cyclonev_io_obuf \out_seg_1[3]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[3]), .obar()); // synopsys translate_off defparam \out_seg_1[3]~output .bus_hold = "false"; defparam \out_seg_1[3]~output .open_drain_output = "false"; defparam \out_seg_1[3]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X64_Y0_N53 cyclonev_io_obuf \out_seg_1[4]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[4]), .obar()); // synopsys translate_off defparam \out_seg_1[4]~output .bus_hold = "false"; defparam \out_seg_1[4]~output .open_drain_output = "false"; defparam \out_seg_1[4]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X62_Y0_N76 cyclonev_io_obuf \out_seg_1[5]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[5]), .obar()); // synopsys translate_off defparam \out_seg_1[5]~output .bus_hold = "false"; defparam \out_seg_1[5]~output .open_drain_output = "false"; defparam \out_seg_1[5]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X65_Y0_N53 cyclonev_io_obuf \out_seg_1[6]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[6]), .obar()); // synopsys translate_off defparam \out_seg_1[6]~output .bus_hold = "false"; defparam \out_seg_1[6]~output .open_drain_output = "false"; defparam \out_seg_1[6]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X62_Y0_N93 cyclonev_io_obuf \out_seg_1[7]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_1[7]), .obar()); // synopsys translate_off defparam \out_seg_1[7]~output .bus_hold = "false"; defparam \out_seg_1[7]~output .open_drain_output = "false"; defparam \out_seg_1[7]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X64_Y61_N2 cyclonev_io_obuf \out_seg_2[0]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[0]), .obar()); // synopsys translate_off defparam \out_seg_2[0]~output .bus_hold = "false"; defparam \out_seg_2[0]~output .open_drain_output = "false"; defparam \out_seg_2[0]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X7_Y0_N36 cyclonev_io_obuf \out_seg_2[1]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[1]), .obar()); // synopsys translate_off defparam \out_seg_2[1]~output .bus_hold = "false"; defparam \out_seg_2[1]~output .open_drain_output = "false"; defparam \out_seg_2[1]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X7_Y0_N53 cyclonev_io_obuf \out_seg_2[2]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[2]), .obar()); // synopsys translate_off defparam \out_seg_2[2]~output .bus_hold = "false"; defparam \out_seg_2[2]~output .open_drain_output = "false"; defparam \out_seg_2[2]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y13_N22 cyclonev_io_obuf \out_seg_2[3]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[3]), .obar()); // synopsys translate_off defparam \out_seg_2[3]~output .bus_hold = "false"; defparam \out_seg_2[3]~output .open_drain_output = "false"; defparam \out_seg_2[3]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y12_N5 cyclonev_io_obuf \out_seg_2[4]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[4]), .obar()); // synopsys translate_off defparam \out_seg_2[4]~output .bus_hold = "false"; defparam \out_seg_2[4]~output .open_drain_output = "false"; defparam \out_seg_2[4]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y10_N62 cyclonev_io_obuf \out_seg_2[5]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[5]), .obar()); // synopsys translate_off defparam \out_seg_2[5]~output .bus_hold = "false"; defparam \out_seg_2[5]~output .open_drain_output = "false"; defparam \out_seg_2[5]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y11_N22 cyclonev_io_obuf \out_seg_2[6]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[6]), .obar()); // synopsys translate_off defparam \out_seg_2[6]~output .bus_hold = "false"; defparam \out_seg_2[6]~output .open_drain_output = "false"; defparam \out_seg_2[6]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y11_N5 cyclonev_io_obuf \out_seg_2[7]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_2[7]), .obar()); // synopsys translate_off defparam \out_seg_2[7]~output .bus_hold = "false"; defparam \out_seg_2[7]~output .open_drain_output = "false"; defparam \out_seg_2[7]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X53_Y61_N2 cyclonev_io_obuf \out_seg_3[0]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[0]), .obar()); // synopsys translate_off defparam \out_seg_3[0]~output .bus_hold = "false"; defparam \out_seg_3[0]~output .open_drain_output = "false"; defparam \out_seg_3[0]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y13_N56 cyclonev_io_obuf \out_seg_3[1]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[1]), .obar()); // synopsys translate_off defparam \out_seg_3[1]~output .bus_hold = "false"; defparam \out_seg_3[1]~output .open_drain_output = "false"; defparam \out_seg_3[1]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y13_N39 cyclonev_io_obuf \out_seg_3[2]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[2]), .obar()); // synopsys translate_off defparam \out_seg_3[2]~output .bus_hold = "false"; defparam \out_seg_3[2]~output .open_drain_output = "false"; defparam \out_seg_3[2]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y11_N56 cyclonev_io_obuf \out_seg_3[3]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[3]), .obar()); // synopsys translate_off defparam \out_seg_3[3]~output .bus_hold = "false"; defparam \out_seg_3[3]~output .open_drain_output = "false"; defparam \out_seg_3[3]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y11_N39 cyclonev_io_obuf \out_seg_3[4]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[4]), .obar()); // synopsys translate_off defparam \out_seg_3[4]~output .bus_hold = "false"; defparam \out_seg_3[4]~output .open_drain_output = "false"; defparam \out_seg_3[4]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y12_N39 cyclonev_io_obuf \out_seg_3[5]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[5]), .obar()); // synopsys translate_off defparam \out_seg_3[5]~output .bus_hold = "false"; defparam \out_seg_3[5]~output .open_drain_output = "false"; defparam \out_seg_3[5]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y10_N96 cyclonev_io_obuf \out_seg_3[6]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[6]), .obar()); // synopsys translate_off defparam \out_seg_3[6]~output .bus_hold = "false"; defparam \out_seg_3[6]~output .open_drain_output = "false"; defparam \out_seg_3[6]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOOBUF_X68_Y10_N79 cyclonev_io_obuf \out_seg_3[7]~output ( .i(vcc), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), .parallelterminationcontrol(16'b0000000000000000), .devoe(devoe), .o(out_seg_3[7]), .obar()); // synopsys translate_off defparam \out_seg_3[7]~output .bus_hold = "false"; defparam \out_seg_3[7]~output .open_drain_output = "false"; defparam \out_seg_3[7]~output .shift_series_termination_control = "false"; // synopsys translate_on // Location: IOIBUF_X10_Y0_N41 cyclonev_io_ibuf \HID_PC[0]~input ( .i(HID_PC[0]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_PC[0]~input_o )); // synopsys translate_off defparam \HID_PC[0]~input .bus_hold = "false"; defparam \HID_PC[0]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X14_Y0_N52 cyclonev_io_ibuf \HID_Hi_Low[0]~input ( .i(HID_Hi_Low[0]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_Hi_Low[0]~input_o )); // synopsys translate_off defparam \HID_Hi_Low[0]~input .bus_hold = "false"; defparam \HID_Hi_Low[0]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X50_Y0_N35 cyclonev_io_ibuf \HID_Register[4]~input ( .i(HID_Register[4]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_Register[4]~input_o )); // synopsys translate_off defparam \HID_Register[4]~input .bus_hold = "false"; defparam \HID_Register[4]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X12_Y0_N52 cyclonev_io_ibuf \HID_Register[2]~input ( .i(HID_Register[2]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_Register[2]~input_o )); // synopsys translate_off defparam \HID_Register[2]~input .bus_hold = "false"; defparam \HID_Register[2]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X12_Y0_N35 cyclonev_io_ibuf \HID_Register[0]~input ( .i(HID_Register[0]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_Register[0]~input_o )); // synopsys translate_off defparam \HID_Register[0]~input .bus_hold = "false"; defparam \HID_Register[0]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X17_Y0_N75 cyclonev_io_ibuf \HID_Register[1]~input ( .i(HID_Register[1]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_Register[1]~input_o )); // synopsys translate_off defparam \HID_Register[1]~input .bus_hold = "false"; defparam \HID_Register[1]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X10_Y0_N58 cyclonev_io_ibuf \HID_Register[3]~input ( .i(HID_Register[3]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\HID_Register[3]~input_o )); // synopsys translate_off defparam \HID_Register[3]~input .bus_hold = "false"; defparam \HID_Register[3]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X46_Y0_N18 cyclonev_io_ibuf \clk[0]~input ( .i(clk[0]), .ibar(gnd), .dynamicterminationcontrol(gnd), .o(\clk[0]~input_o )); // synopsys translate_off defparam \clk[0]~input .bus_hold = "false"; defparam \clk[0]~input .simulate_z_as = "z"; // synopsys translate_on // Location: LABCELL_X56_Y45_N3 cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I ( // Equation(s): .dataa(gnd), .datab(gnd), .datac(gnd), .datad(gnd), .datae(gnd), .dataf(gnd), .datag(gnd), .cin(gnd), .sharein(gnd), .combout(\~QUARTUS_CREATED_GND~I_combout ), .sumout(), .cout(), .shareout()); // synopsys translate_off defparam \~QUARTUS_CREATED_GND~I .extended_lut = "off"; defparam \~QUARTUS_CREATED_GND~I .lut_mask = 64'h0000000000000000; defparam \~QUARTUS_CREATED_GND~I .shared_arith = "off"; // synopsys translate_on endmodule