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TroubleElectrical committed 2026-10-16 10:10:37 +11:00
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`ifndef REGISTER_FILE_H
`define REGISTER_FILE_H
module register_file #(parameter width=5, parameter nregs=5)(
input logic [0:0] clk, input logic[0:0] we,
input logic [nregs-1:0] WA, input logic [2**width-1:0] WD,
input logic [nregs-1:0] RA1, output logic [2**width-1:0] RD1,
input logic [nregs-1:0] RA2, output logic [2**width-1:0] RD2,
output logic [2**width-1:0] regs_out [2**nregs]
);
localparam BW = 2**width;
logic [2**width-1:0] regs[2**nregs];
initial begin
regs[0] = {(2**width){1'b0}};
end
always_ff @(posedge clk) begin
if (we & (WA != {(2**width){1'b0}} )) begin
regs[WA] <= WD;
end
end
assign RD1 = regs[RA1];
assign RD2 = regs[RA2];
assign regs_out = regs; // Expose registers externally
endmodule
`endif