Added files into modelsim folder

ModelSim/alu.sv

@@ -8,11 +8,13 @@
 // flags[1:1] = Overflow
 module alu #(parameter width=2)(input logic [3:0] op,
     input logic [2**width-1:0] A, input logic [2**width-1:0] B,
-    output logic [2**width-1:0] OUT_1, output logic[1:0] flags);
-
+    output logic [2**width-1:0] OUT_1, output logic[2:0] flags
+    );
+    // intermediate logic for handling asu output
     logic [0:0] asu_op;
     logic [2**width-1:0] asu_out;
-    logic [1:0] asu_flags;
+    logic [2:0] asu_flags;
+
     asu #(width) adder_unit(asu_op[op[1]], A, B, asu_out, asu_flags[0], asu_flags[1]);
 
     logic [2**width-1:0] lu_out;
@@ -32,6 +34,7 @@ module alu #(parameter width=2)(input logic [3:0] op,
             4'b1011: begin OUT_1 = ~asu_flags[0] & {{(width-1){1'b0}}, 1'b1}; flags = asu_flags; end
             default: begin OUT_1 = {(2**width){1'b0}}; flags = asu_flags; end
         endcase
+        asu_flags[2] = OUT_1 == 0;
     end
 endmodule
-`endif
+`endif