From c4ebde769219a21266c2682c807c01914df54439 Mon Sep 17 00:00:00 2001 From: Riley King-Saunders Date: Mon, 14 Sep 2026 00:13:17 +1000 Subject: [PATCH] Updated ASU to use an explicit MUX rather than the XOR inversion 'trick' when calculating the operand --- modules/asu.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/modules/asu.sv b/modules/asu.sv index b0b882f..5b0440e 100644 --- a/modules/asu.sv +++ b/modules/asu.sv @@ -10,7 +10,8 @@ module asu #(parameter width = 2)( always_comb begin // A + (sub) ? B : -B // Adds an extra bit to all operands to calculate the carry bit. Not optimal for hardware synthesis - operand = (B ^ {(2**width){op}}); + //operand = (B ^ {(2**width){op}}); + operand = op == 1'b0 ? B : ~B; {COUT, OUT_1} = A + operand + {{(2**width-1){1'b0}}, op}; end @@ -18,5 +19,4 @@ module asu #(parameter width = 2)( // Cin for final bit in adder to later be xor'ed with COUT to determine if a signed overflow occured for the MIPS architecture assign OUT_CIN = A[2**width-1] ^ operand[2**width-1] ^ OUT_1[2**width-1]; endmodule - `endif \ No newline at end of file