TroubleElectrical/FPGA_Uni
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Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments

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TroubleElectrical committed 2026-09-15 21:08:40 +10:00
1 parent c27a04ef73
commit afa8d9d4db
79 files changed
+1935 -1153
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Quartus/A1_Q1/db/seven_seg.tmw_info
+7 -4
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@@ -1,4 +1,7 @@
start_full_compilation:s
start_assembler:s-start_full_compilation
start_timing_analyzer:s-start_full_compilation
start_eda_netlist_writer:s-start_full_compilation
start_full_compilation:s:00:00:59
start_analysis_synthesis:s:00:00:12-start_full_compilation
start_analysis_elaboration:s-start_full_compilation
start_fitter:s:00:00:31-start_full_compilation
start_assembler:s:00:00:07-start_full_compilation
start_timing_analyzer:s:00:00:07-start_full_compilation
start_eda_netlist_writer:s:00:00:02-start_full_compilation