From 878f949e5f3635934799ad1cbc1ec3f0e399cf1d Mon Sep 17 00:00:00 2001 From: Riley King-Saunders Date: Fri, 16 Oct 2026 11:34:31 +1100 Subject: [PATCH] Made addrwidth sizing consistent with the 2^N used everywhere --- modules/ram.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/modules/ram.sv b/modules/ram.sv index eaddf77..0bb0fa7 100644 --- a/modules/ram.sv +++ b/modules/ram.sv @@ -3,7 +3,7 @@ module ram #(addrwidth=9, datawidth=5)( input logic [0:0] clk, - input logic [2**addrwidth-1:0] addr, + input logic [addrwidth-1:0] addr, input logic [0:0] we, input logic [datawidth-1:0] data_in, output logic [datawidth-1:0] data_out