TroubleElectrical/FPGA_Uni
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TroubleElectrical committed 2026-09-16 13:01:43 +10:00
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Submission/Q6.txt
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@@ -1,3 +1,7 @@
// Sumbission for ELEC4720 Assignment 1 Question 6
// Oliver Boutros (c3428958)
// Riley King-Saunders (c
`ifndef INSTRUCTION_CLASSIFIER_H_SV
`define INSTRUCTION_CLASSIFIER_H_SV
module instruction_classifier(input logic[5:0] op,