diff --git a/modules/alu.sv b/modules/alu.sv
index 7fb1069..77f31e5 100644
--- a/modules/alu.sv
+++ b/modules/alu.sv
@@ -17,11 +17,13 @@ module alu #(parameter width=2)(input logic [3:0] op,
     logic [2:0] asu_flags;
 
     assign asu_op = op[1];
-    asu #(width) adder_unit(asu_op, A, B, asu_out, asu_flags[0], asu_flags[1]);
+    logic [0:0] asu_cout_flag;
+    asu #(width) adder_unit(asu_op, A, B, asu_out, asu_flags[0], asu_cout_flag);
 
     logic [2**width-1:0] lu_out;
     lu #(width) logic_unit(op[1:0], A, B, lu_out);
 
+    assign asu_flags[1] = asu_cout_flag ^ asu_flags[0];
     always_comb begin
         case (op) 
             4'b0000: begin OUT_1 = asu_out; end