From 287fc1903d8343fba3f62962d40e3e1934d08980 Mon Sep 17 00:00:00 2001 From: Riley King-Saunders Date: Tue, 15 Sep 2026 21:28:01 +1000 Subject: [PATCH] Updated default ASU testbench width to be 4-bit to align with seven segment width for demo --- tests/asu_tb.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/asu_tb.sv b/tests/asu_tb.sv index e0285fb..63069d5 100644 --- a/tests/asu_tb.sv +++ b/tests/asu_tb.sv @@ -1,6 +1,6 @@ `include "asu.sv" -module asu_tb #(width=8)(); +module asu_tb #(width=4)(); logic [0:0] op; logic [width-1:0] A; logic [width-1:0] B;