Updated Q2 project and LU code such that it operates properly on the board. Changed to utilising a case statement for easier readability and also compiled and tested the code on the board.

This commit is contained in:
TroubleElectrical committed 2026-09-08 15:36:51 +10:00
1 parent 32eea036a8
commit 2208eb4f16
101 files changed
+4341 -10

No files matched your search

+12
View File
@@ -0,0 +1,12 @@
module lu #(width=8) (
input logic [1:0] op,
input logic [width-1:0] A, input logic [width-1:0] B,
output logic [width-1:0] OUT_1);
always_comb begin
if (op == 2'b00) OUT_1 = A & B;
else if (op == 2'b01) OUT_1 = A | B;
else if (op == 2'b10) OUT_1 = A ^ B;
else if (op == 2'b10) OUT_1 = ~(A | B);
end
endmodule