Updated Q2 project and LU code such that it operates properly on the board. Changed to utilising a case statement for easier readability and also compiled and tested the code on the board.

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TroubleElectrical committed 2026-09-08 15:36:51 +10:00
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module lu #(width=8) (
module lu #(parameter width = 2) (
input logic [1:0] op,
input logic [width-1:0] A, input logic [width-1:0] B,
output logic [width-1:0] OUT_1);
input logic [2**width-1:0] A,
input logic [2**width-1:0] B,
output logic [2**width-1:0] Y);
always_comb begin
if (op == 2'b00) OUT_1 = A & B;
else if (op == 2'b01) OUT_1 = A | B;
else if (op == 2'b10) OUT_1 = A ^ B;
else if (op == 2'b10) OUT_1 = ~(A | B);
case (op)
2'b00: Y = A & B;
2'b01: Y = A | B;
2'b10: Y = A ^ B;
2'b11: Y = ~(A | B);
default: Y = '0;
endcase
end
endmodule