Updated ram and rom modules so that naming is more consistent

modules/ram.sv

@@ -1,4 +1,4 @@
-module RAM #(addrwidth=9, datawidth=5)(
+module rom #(addrwidth=9, datawidth=5)(
     input logic [0:0] clk,
     input logic [2**addrwidth-1:0] addr,
     input logic [0:0] we,