Added header guards to prevent errors from double-inclusions

modules/instruction_classifier.sv

@@ -1,3 +1,5 @@
+`ifndef INSTRUCTION_CLASSIFIER_H_SV
+`define INSTRUCTION_CLASSIFIER_H_SV
 // TODO: This needs to be reworked to use manual mux-ing as to ensure low gate delay
 module instruction_classifier(input logic[5:0] op,
     output logic[0:0] R, output logic[0:0] B1, output logic[0:0] J,
@@ -14,6 +16,7 @@ module instruction_classifier(input logic[5:0] op,
             6'b00001?: OUT_1 = 7'b0000100;
             6'b000001: OUT_1 = 7'b0000010;
             6'b000000: OUT_1 = 7'b0000001;
+            default:   OUT_1 = 7'bxxxxxxx;
         endcase
 
         R  = OUT_1[6];
@@ -24,4 +27,5 @@ module instruction_classifier(input logic[5:0] op,
         F  = OUT_1[1];
         M  = OUT_1[0];
     end
-endmodule
+endmodule
+`endif