Added initialisation blocks for PC and GPR's

modules/register_file.sv

@@ -12,7 +12,8 @@ module register_file #(parameter width=5, parameter nregs=5)(
     logic [2**width-1:0] regs[2**nregs];
 
     initial begin
-        regs[0] = {(2**width){1'b0}};
+        for (integer N = 0; N < (2**nregs); ++N)
+            regs[N] = 32'd0;
     end
 
     always_ff @(posedge clk) begin