TroubleElectrical/FPGA_Uni
1
0 Fork 0
Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity

Created general project structure. Only seven segment, logic unit and adder/subtractor modules and tests implemented

Browse Source
This commit is contained in:
riley committed 2026-09-03 15:25:07 +10:00
1 parent 41252763d4
commit 0c21734447
16 files changed
+383
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

tests/instruction_classifier_tb.v
+1
View File
@@ -0,0 +1 @@
`#include "instruction_classifier.v"