Created general project structure. Only seven segment, logic unit and adder/subtractor modules and tests implemented

This commit is contained in:
riley committed 2026-09-03 15:25:07 +10:00
1 parent 41252763d4
commit 0c21734447
16 files changed
+383

No files matched your search

+20
View File
@@ -0,0 +1,20 @@
`include "asu.v"
`include "lu.v"
// flags[0:0] = Cout
// flags[1:1] = Overflow
module alu #(width=8)(input logic [3:0] op,
input logic [width-1:0] A, input logic [width-1:0] B.
output logic [width-1:0] OUT_1, output logic flags[1:0]);
logic [width-1:0] asu_out;
logic [1:0] asu_flags;
logic [0:0] asu_op;
asu #(width) adder_unit(asu_op, A, B, asu_out, asu_flags[0], asu_flags[1]);
logic [width-1:0] lu_out;
lu #(width) logic_unit(op[1:0], A, B, lu_out);
// Cout = asu_flags[0]
// Overflow = asu_flags[0] ^ asu_flags[1]
endmodule